Lifting yield with inline defect analysis

The challenge

A representative advanced-node fab needs to find the defect — and its root cause — before the lot ships.

Manual and rule-based visual inspection struggles with micro-cracks and sub-surface anomalies, and a defect that escapes inspection is only caught later, when the cost of the lot is already sunk. McKinsey puts yield loss and test at 20-30% of total production cost, and estimates that machine-learning root-cause analysis can reduce yield detraction by up to about 30%.

The harder problem is scale, not accuracy in a lab. Survey work suggests only around 17% of ML vision inspection has reached high-volume production; the rest is still in pilot. Closing that gap — integration, evaluation, and governance — is what this engagement is scoped around.

Setting

Representative — advanced-node fab

System concept

Semiconductor intelligence

Illustrative duration

16 weeks

The architecture

This architecture applies semiconductor inspection and analysis to the fab's own inspection and metrology data. Models are tuned and evaluated on the client's historical defect library under a signed data agreement and validated against expert inspector review. Inspection agents classify defects by type and severity across magnification levels; an analysis agent correlates defect signatures with process and FDC parameters to propose a likely root cause. Every process adjustment leaves the system as a recommendation routed to a process engineer — never as an automatic change to a tool.

A proposed delivery path

This sequence illustrates the engagement. The actual scope, timeline and quotation are agreed around your requirements.

Benchmark context

Published figures used to frame this scenario. Baselines describe the referenced setting; targets are illustrative, not measured project outcomes.

Deliverables & controls

What the scope can include

• Inspection and analysis agents running against your own imaging and metrology feeds
• Defect taxonomy and labeling standard agreed with your engineering team
• Evaluation harness with per-product-line thresholds and a documented accuracy baseline
• MES and imaging integration contracts, plus drift alerts and a rollback path
• All source code in your repository, with the deployment owned by your team

Where people stay in control

• Process adjustments are recommendations. A process engineer approves every change; the system never writes to a tool.
• The system runs alongside the existing inspection process through calibration, so the fab keeps a comparison baseline.
• Accuracy figures are stated as a ceiling from published studies, not a commitment — real performance depends on your defect library and imaging.
• Proprietary defect data stays inside the fab's environment under the signed data agreement and is not used to train shared models.

Sources behind the scenario

1. ML root-cause analysis reduces yield detraction by up to ~30%
   McKinsey
2. Yield loss and test account for 20-30% of total production cost
   McKinsey
3. AI at scale can cut semiconductor manufacturing cost by up to ~17%
   McKinsey, 2021
4. Deep-learning machine vision reaches >97-99% wafer/defect classification accuracy
   Peer-reviewed studies
5. Only ~17% of ML vision inspection is in high-volume production — the rest is pilot
   ScienceDirect survey